diff options
| author | Mika Kuoppala <mika.kuoppala@linux.intel.com> | 2016-02-18 18:21:14 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2016-02-22 18:21:04 +0300 |
| commit | 1e657ad7a48f1ce5005dfa570749f8e78f06ff44 (patch) | |
| tree | ebb21982793a6abfe8c3d9af8ab98ada9eb07dd6 /drivers/gpu/drm/i915/intel_csr.c | |
| parent | 5b076889f6239f8214967894464ab636f7415aff (diff) | |
| download | linux-1e657ad7a48f1ce5005dfa570749f8e78f06ff44.tar.xz | |
drm/i915/gen9: Write dc state debugmask bits only once
DMC debugmask bits should stick so no need to write them
everytime dc state is changed.
v2: Write after firmware has been successfully loaded (Ville)
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1455808874-22089-5-git-send-email-mika.kuoppala@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_csr.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_csr.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c index b453fccfa25d..902054efb902 100644 --- a/drivers/gpu/drm/i915/intel_csr.c +++ b/drivers/gpu/drm/i915/intel_csr.c @@ -220,19 +220,19 @@ static const struct stepping_info *intel_get_stepping_info(struct drm_device *de * Everytime display comes back from low power state this function is called to * copy the firmware from internal memory to registers. */ -void intel_csr_load_program(struct drm_i915_private *dev_priv) +bool intel_csr_load_program(struct drm_i915_private *dev_priv) { u32 *payload = dev_priv->csr.dmc_payload; uint32_t i, fw_size; if (!IS_GEN9(dev_priv)) { DRM_ERROR("No CSR support available for this platform\n"); - return; + return false; } if (!dev_priv->csr.dmc_payload) { DRM_ERROR("Tried to program CSR with empty payload\n"); - return; + return false; } fw_size = dev_priv->csr.dmc_fw_size; @@ -245,6 +245,8 @@ void intel_csr_load_program(struct drm_i915_private *dev_priv) } dev_priv->csr.dc_state = 0; + + return true; } static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, |