summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/intel_csr.c
diff options
context:
space:
mode:
authorDaniel Vetter <daniel.vetter@intel.com>2015-10-29 00:59:04 +0300
committerJani Nikula <jani.nikula@intel.com>2015-11-12 18:29:26 +0300
commit8144ac59bdc9205c45cd8c45374967e6be90f7d8 (patch)
treea2f03bc9cbe7e700302229817290a38b1cf2ea0e /drivers/gpu/drm/i915/intel_csr.c
parent6a6582bfff39f099d0867e8b97b409efd1d84b9a (diff)
downloadlinux-8144ac59bdc9205c45cd8c45374967e6be90f7d8.tar.xz
drm/i915: Use request_firmware and our own async work
Two benefits: - We can use FW_LOADER_USERSPACE_FALLBACK. - We can use flush_work to synchronize with the oustanding worker, which is a notch more obvious what it does than having a special completion. The next patch will properly synchronize against the async loader in the resume and unload code. Cc: Damien Lespiau <damien.lespiau@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Sunil Kamath <sunil.kamath@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Tested-by: Daniel Stone <daniels@collabora.com> # SKL Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1446069547-24760-11-git-send-email-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_csr.c')
-rw-r--r--drivers/gpu/drm/i915/intel_csr.c26
1 files changed, 13 insertions, 13 deletions
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index 1c0765baa795..50790725d514 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -361,11 +361,18 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
return dmc_payload;
}
-static void finish_csr_load(const struct firmware *fw, void *context)
+static void csr_load_work_fn(struct work_struct *work)
{
- struct drm_i915_private *dev_priv = context;
- struct intel_csr *csr = &dev_priv->csr;
+ struct drm_i915_private *dev_priv;
+ struct intel_csr *csr;
+ const struct firmware *fw;
+ int ret;
+
+ dev_priv = container_of(work, typeof(*dev_priv), csr.work);
+ csr = &dev_priv->csr;
+ ret = request_firmware(&fw, dev_priv->csr.fw_path,
+ &dev_priv->dev->pdev->dev);
if (!fw)
goto out;
@@ -401,7 +408,8 @@ out:
void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
{
struct intel_csr *csr = &dev_priv->csr;
- int ret;
+
+ INIT_WORK(&dev_priv->csr.work, csr_load_work_fn);
if (!HAS_CSR(dev_priv))
return;
@@ -423,15 +431,7 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
*/
intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
- /* CSR supported for platform, load firmware */
- ret = request_firmware_nowait(THIS_MODULE, true, csr->fw_path,
- &dev_priv->dev->pdev->dev,
- GFP_KERNEL, dev_priv,
- finish_csr_load);
-
- if (ret)
- DRM_ERROR("Failed to load DMC firmware, disabling rpm (%d)\n",
- ret);
+ schedule_work(&dev_priv->csr.work);
}
/**