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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-04-19 13:24:39 +0400 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-04-24 16:46:30 +0400 |
| commit | 2a7aceecf15a463ba6bfa83b6579e75bb4703cd9 (patch) | |
| tree | ede06e03bbc77aaa66f72c6ed2dbc733379ccfdf /drivers/gpu/drm/i915/intel_crt.c | |
| parent | 996a2239f93b03c5972923f04b097f65565c5bed (diff) | |
| download | linux-2a7aceecf15a463ba6bfa83b6579e75bb4703cd9.tar.xz | |
drm/i915: Fixup non-24bpp support for VGA screens on Haswell
The LPT PCH only supports 8bpc, so we need to force the pipe bpp
to the right value.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_crt.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_crt.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index c063b9f0dd51..991e53047e1d 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c @@ -214,6 +214,10 @@ static bool intel_crt_compute_config(struct intel_encoder *encoder, if (HAS_PCH_SPLIT(dev)) pipe_config->has_pch_encoder = true; + /* LPT FDI RX only supports 8bpc. */ + if (HAS_PCH_LPT(dev)) + pipe_config->pipe_bpp = 24; + return true; } |