diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2017-01-26 22:57:19 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2017-02-08 19:07:10 +0300 |
| commit | 1a5301a58e5fca15598a1b3e79706b522d763574 (patch) | |
| tree | 139fec5d7d9edcf044eea84089638a71651b6803 /drivers/gpu/drm/i915/intel_cdclk.c | |
| parent | 83c5fda74f98307a19189414889363341ede8067 (diff) | |
| download | linux-1a5301a58e5fca15598a1b3e79706b522d763574.tar.xz | |
drm/i915: Move PFI credit reprogramming into vlv/chv_set_cdclk()
Move the vlv_program_pfi_credits() into vlv_set_cdclk() and
chv_set_cdclk() so that we can neuter vlv_modeset_commit_cdclk().
v2: Do the PFI programming after cdclk readout since it currently
depends on the readout to fill dev_priv->cdclk.hw
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170126195719.309-1-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_cdclk.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_cdclk.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c index d0dc6f94277c..305c07820cae 100644 --- a/drivers/gpu/drm/i915/intel_cdclk.c +++ b/drivers/gpu/drm/i915/intel_cdclk.c @@ -547,6 +547,8 @@ static void vlv_set_cdclk(struct drm_i915_private *dev_priv, mutex_unlock(&dev_priv->sb_lock); intel_update_cdclk(dev_priv); + + vlv_program_pfi_credits(dev_priv); } static void chv_set_cdclk(struct drm_i915_private *dev_priv, @@ -586,6 +588,8 @@ static void chv_set_cdclk(struct drm_i915_private *dev_priv, mutex_unlock(&dev_priv->rps.hw_lock); intel_update_cdclk(dev_priv); + + vlv_program_pfi_credits(dev_priv); } static int bdw_calc_cdclk(int max_pixclk) @@ -1524,7 +1528,6 @@ static void vlv_modeset_commit_cdclk(struct drm_atomic_state *old_state) else vlv_set_cdclk(dev_priv, &dev_priv->cdclk.actual); - vlv_program_pfi_credits(dev_priv); intel_display_power_put(dev_priv, POWER_DOMAIN_PIPE_A); } |