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| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2011-05-11 20:49:31 +0400 |
|---|---|---|
| committer | Keith Packard <keithp@keithp.com> | 2011-05-14 05:12:53 +0400 |
| commit | 645c62a5e95a5f9a8e0d0627446bbda4ee042024 (patch) | |
| tree | 5c1872335ce9bfe99a78bc69bf3490dcf8fc0f60 /drivers/gpu/drm/i915/i915_suspend.c | |
| parent | 28963a3eb5e2ae861995c2f7c15c7de982b3ce0e (diff) | |
| download | linux-645c62a5e95a5f9a8e0d0627446bbda4ee042024.tar.xz | |
drm/i915: split PCH clock gating init
Ibex Peak and CougarPoint already require a different setting (added
here), and future chips will likely follow that precedent.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_suspend.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_suspend.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 6cb27ff51891..60a94d2b5264 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c @@ -863,8 +863,7 @@ int i915_restore_state(struct drm_device *dev) I915_WRITE(IMR, dev_priv->saveIMR); } - /* Clock gating state */ - dev_priv->display.init_clock_gating(dev); + intel_init_clock_gating(dev); if (IS_IRONLAKE_M(dev)) { ironlake_enable_drps(dev); |