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| author | Mika Kuoppala <mika.kuoppala@linux.intel.com> | 2016-06-07 17:19:04 +0300 |
|---|---|---|
| committer | Mika Kuoppala <mika.kuoppala@intel.com> | 2016-06-08 16:24:13 +0300 |
| commit | b033bb6d5d3a0e51d56b3ba929a8db4e18da0892 (patch) | |
| tree | 5148bec01e10f4eb9d1c3eaa57f856040c6d02a5 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | fe90581987cd5fadd2942f59f8511bcb39fdec34 (diff) | |
| download | linux-b033bb6d5d3a0e51d56b3ba929a8db4e18da0892.tar.xz | |
drm/i915/gen9: Enable must set chicken bits in config0 reg
The bspec states that these must be set in CONFIG0 for all gen9.
v2: rebase
v3: fix spacing (Matthew)
References: HSD#2134995
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1465309159-30531-13-git-send-email-mika.kuoppala@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 371b56cb7411..98f05a2ecc40 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -220,6 +220,9 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) #define ECOCHK_PPGTT_WT_HSW (0x2<<3) #define ECOCHK_PPGTT_WB_HSW (0x3<<3) +#define GEN8_CONFIG0 _MMIO(0xD00) +#define GEN9_DEFAULT_FIXES (1 << 3 | 1 << 2 | 1 << 1) + #define GAC_ECO_BITS _MMIO(0x14090) #define ECOBITS_SNB_BIT (1<<13) #define ECOBITS_PPGTT_CACHE64B (3<<8) |