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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2016-04-13 21:09:30 +0300 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2016-04-14 14:45:00 +0300 |
commit | 297b32ec7e9a20749cf72e95c648e69ebf9a4d31 (patch) | |
tree | 76bca21aaf4cee65f9442ff9d556a98594d065ff /drivers/gpu/drm/i915/i915_reg.h | |
parent | 0ccdacf694e9e5b77601ac872f38ffba96dc5dac (diff) | |
download | linux-297b32ec7e9a20749cf72e95c648e69ebf9a4d31.tar.xz |
drm/i915: Ignore GTFIFODBG FIFO free entry fields on CHV
On CHV GTFIFODBG has some read-only bits to indicate the number
of free FIFO entries. Ignore these when checking to see if any
of the sticky error bits are set.
This gets rid of these during device resume:
[drm:cherryview_enable_rps] GT fifo had a previous error 1080000
While at it, move the assignments out of the if().
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1460570970-14073-1-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index d0a1928870ea..03264fd30fdd 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6866,6 +6866,8 @@ enum skl_disp_power_wells { #define VLV_SPAREG2H _MMIO(0xA194) #define GTFIFODBG _MMIO(0x120000) +#define GT_FIFO_SBDEDICATE_FREE_ENTRY_CHV (0x1f << 20) +#define GT_FIFO_FREE_ENTRIES_CHV (0x7f << 13) #define GT_FIFO_SBDROPERR (1<<6) #define GT_FIFO_BLOBDROPERR (1<<5) #define GT_FIFO_SB_READ_ABORTERR (1<<4) |