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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-11-07 01:02:20 +0400 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-11-21 12:06:31 +0400 |
| commit | 37c1d94fa83482c308f14ec671910278e8647934 (patch) | |
| tree | 3e987bbc44b51a1c3dcaa1d85466465cc9837448 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | 9688ecadd268770834cca72ac81c9aec8fb8cf2f (diff) | |
| download | linux-37c1d94fa83482c308f14ec671910278e8647934.tar.xz | |
drm/i915: Emit SRM after the MSG_FBC_REND_STATE LRI
The spec tells us that we need to emit an SRM after the LRI
to MSG_FBC_REND_STATE.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 04d46b23d97c..1777bebc664b 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -235,6 +235,7 @@ */ #define MI_LOAD_REGISTER_IMM(x) MI_INSTR(0x22, 2*x-1) #define MI_STORE_REGISTER_MEM(x) MI_INSTR(0x24, 2*x-1) +#define MI_SRM_LRM_GLOBAL_GTT (1<<22) #define MI_FLUSH_DW MI_INSTR(0x26, 1) /* for GEN6 */ #define MI_FLUSH_DW_STORE_INDEX (1<<21) #define MI_INVALIDATE_TLB (1<<18) |