diff options
| author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2017-11-29 13:28:05 +0300 |
|---|---|---|
| committer | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2017-11-29 15:29:40 +0300 |
| commit | cf669b4e9fdce4cf1a7bef4e7ab8b3db0da021a2 (patch) | |
| tree | 2ee9133c5a24319204869fb9ef69b7da3567a9be /drivers/gpu/drm/i915/i915_pmu.c | |
| parent | 439e2ee4ca520e72870e4fa44aa0076060ad6857 (diff) | |
| download | linux-cf669b4e9fdce4cf1a7bef4e7ab8b3db0da021a2.tar.xz | |
drm/i915: Consolidate checks for engine stats availability
Sagar noticed the check can be consolidated between the engine stats
implementation and the PMU.
My first choice was a static inline helper but that got into include
ordering mess quickly fast so I went with a macro instead. At some point
we should perhaps looking into taking out the non-ringubffer bits from
intel_ringbuffer.h into a new intel_engine.h or something.
v2: Use engine->flags. (Chris Wilson)
v3: Rebase and mark GuC as not yet supported. (Chris Wilson)
v4: Move flag setting to intel_engines_reset_default_submission.
(Chris Wilson)
v5: Move flag setting to logical_ring_setup.
v6: intel_engines_reset_default_submission is the wrong place to set the
flag - it needs to be in execlists_set_default_submission. (Sagar)
v7: Flag setting in logical_ring_setup is not required. (Chris)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> (v6)
Link: https://patchwork.freedesktop.org/patch/msgid/20171129102805.22690-1-tvrtko.ursulin@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_pmu.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_pmu.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c index 1c0ee9d68b04..e8e2faf4982f 100644 --- a/drivers/gpu/drm/i915/i915_pmu.c +++ b/drivers/gpu/drm/i915/i915_pmu.c @@ -90,11 +90,6 @@ static unsigned int event_enabled_bit(struct perf_event *event) return config_enabled_bit(event->attr.config); } -static bool supports_busy_stats(struct drm_i915_private *i915) -{ - return INTEL_GEN(i915) >= 8; -} - static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active) { u64 enable; @@ -123,8 +118,10 @@ static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active) /* * Also there is software busyness tracking available we do not * need the timer for I915_SAMPLE_BUSY counter. + * + * Use RCS as proxy for all engines. */ - else if (supports_busy_stats(i915)) + else if (intel_engine_supports_stats(i915->engine[RCS])) enable &= ~BIT(I915_SAMPLE_BUSY); /* @@ -447,7 +444,7 @@ again: static bool engine_needs_busy_stats(struct intel_engine_cs *engine) { - return supports_busy_stats(engine->i915) && + return intel_engine_supports_stats(engine) && (engine->pmu.enable & BIT(I915_SAMPLE_BUSY)); } |