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author | Uma Shankar <uma.shankar@intel.com> | 2017-01-25 17:13:23 +0300 |
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committer | Jani Nikula <jani.nikula@intel.com> | 2017-02-01 17:18:45 +0300 |
commit | 1881a4234ef03751daf55b62b17e6bb0dbf7792a (patch) | |
tree | 27b344943fc52298c5e4ef5288fc8f9cab918d2f /drivers/gpu/drm/i915/i915_gem_timeline.h | |
parent | 69aeafeae9b30d797c439a30d1a4ccc8dc5b0eb0 (diff) | |
download | linux-1881a4234ef03751daf55b62b17e6bb0dbf7792a.tar.xz |
drm/i915: Add MIPI_IO WA and program DSI regulators
Enable MIPI IO WA for BXT DSI as per bspec and
program the DSI regulators.
v2: Moved IO enable to pre-enable as per Mika's
review comments. Also reused the existing register
definition for BXT_P_CR_GT_DISP_PWRON.
v3: Added Programming the DSI regulators as per disable/enable
sequences.
v4: Restricting regulator changes to BXT as suggested by
Jani/Mika
v5: Removed redundant read/modify for regulator register as
per Jani's comment. Maintain enable/disable symmetry as per spec.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
Acked-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1485353603-11260-1-git-send-email-vidya.srinivas@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_timeline.h')
0 files changed, 0 insertions, 0 deletions