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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2017-01-09 19:16:11 +0300 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2017-01-10 11:12:21 +0300 |
| commit | 944397f04f24eaf05125896dcb601c0e1c917879 (patch) | |
| tree | c44bd229cff40d9c6bf3be5d5c1bc550205c3501 /drivers/gpu/drm/i915/i915_gem_tiling.c | |
| parent | 0d4e8f1dbcab9cf68fec951e7e5dbb6d5d8e3425 (diff) | |
| download | linux-944397f04f24eaf05125896dcb601c0e1c917879.tar.xz | |
drm/i915: Store required fence size/alignment for GGTT vma
The fence size/alignment is a combination of the vma size plus object
tiling parameters. Those parameters are rarely changed, making the fence
size/alignemnt roughly constant for the lifetime of the VMA. We can
simplify subsequent calculations by precalculating the size/alignment
required for GGTT vma taking fencing into account (with an update if we
do change the tiling or stride).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170109161613.11881-4-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_tiling.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem_tiling.c | 36 |
1 files changed, 20 insertions, 16 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index 51b8d71876b7..23a896cd934f 100644 --- a/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c @@ -120,25 +120,18 @@ i915_tiling_ok(struct drm_i915_private *dev_priv, static bool i915_vma_fence_prepare(struct i915_vma *vma, int tiling_mode, unsigned int stride) { - struct drm_i915_private *dev_priv = vma->vm->i915; - u32 size; + struct drm_i915_private *i915 = vma->vm->i915; + u32 size, alignment; if (!i915_vma_is_map_and_fenceable(vma)) return true; - if (INTEL_GEN(dev_priv) == 3) { - if (vma->node.start & ~I915_FENCE_START_MASK) - return false; - } else { - if (vma->node.start & ~I830_FENCE_START_MASK) - return false; - } - - size = i915_gem_get_ggtt_size(dev_priv, vma->size, tiling_mode, stride); + size = i915_gem_get_ggtt_size(i915, vma->size, tiling_mode, stride); if (vma->node.size < size) return false; - if (vma->node.start & (size - 1)) + alignment = i915_gem_get_ggtt_alignment(i915, vma->size, tiling_mode, stride); + if (vma->node.start & (alignment - 1)) return false; return true; @@ -156,6 +149,9 @@ i915_gem_object_fence_prepare(struct drm_i915_gem_object *obj, return 0; list_for_each_entry(vma, &obj->vma_list, obj_link) { + if (!i915_vma_is_ggtt(vma)) + break; + if (i915_vma_fence_prepare(vma, tiling_mode, stride)) continue; @@ -277,10 +273,18 @@ i915_gem_set_tiling(struct drm_device *dev, void *data, mutex_unlock(&obj->mm.lock); list_for_each_entry(vma, &obj->vma_list, obj_link) { - if (!vma->fence) - continue; - - vma->fence->dirty = true; + if (!i915_vma_is_ggtt(vma)) + break; + + vma->fence_size = i915_gem_get_ggtt_size(dev_priv, vma->size, + args->tiling_mode, + args->stride); + vma->fence_alignment = i915_gem_get_ggtt_alignment(dev_priv, vma->size, + args->tiling_mode, + args->stride); + + if (vma->fence) + vma->fence->dirty = true; } obj->tiling_and_stride = args->stride | args->tiling_mode; |