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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2019-12-16 17:24:09 +0300 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-12-17 02:13:12 +0300 |
| commit | 902eb748e5c3d32ad955eef439e0911905758166 (patch) | |
| tree | f7eeccec2fb586ff7b2a4ff746ccdbd26fe2e0c7 /drivers/gpu/drm/i915/i915_gem_gtt.c | |
| parent | 0a9a5532d2962a74004e041eeb2217de930f8c27 (diff) | |
| download | linux-902eb748e5c3d32ad955eef439e0911905758166.tar.xz | |
drm/i915/gt: Tidy up full-ppgtt on Ivybridge
With a couple more memory barriers dotted around the place we can
significantly reduce the MTBF on Ivybridge. Still doesn't really help
Haswell though.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191216142409.2605211-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_gtt.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem_gtt.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index be36719e7987..d9a2f58a620a 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -1709,8 +1709,10 @@ static void gen6_flush_pd(struct gen6_ppgtt *ppgtt, u64 start, u64 end) gen6_for_each_pde(pt, pd, start, end, pde) gen6_write_pde(ppgtt, pde, pt); + mb(); ioread32(ppgtt->pd_addr + pde - 1); gen6_ggtt_invalidate(ppgtt->base.vm.gt->ggtt); + mb(); mutex_unlock(&ppgtt->flush); } |