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authorMatt Roper <matthew.d.roper@intel.com>2020-07-17 01:05:50 +0300
committerRodrigo Vivi <rodrigo.vivi@intel.com>2020-08-17 23:16:07 +0300
commitddff9a602e5e65e99ca6516151ee775560156697 (patch)
treee83990d7dee445d88b9846afee469495470aa3c0 /drivers/gpu/drm/i915/i915_drv.h
parente66f609baeee0d8354d3e1aa7d171a54ce72cb34 (diff)
downloadlinux-ddff9a602e5e65e99ca6516151ee775560156697.tar.xz
drm/i915/rkl: Handle HTI
If HTI (also sometimes called HDPORT) is enabled at startup, it may be using some of the PHYs and DPLLs making them unavailable for general usage. Let's read out the HDPORT_STATE register and avoid making use of resources that HTI is already using. v2: - Fix minor checkpatch warnings v3: - Just readout HDPORT_STATE register once during init and then parse it later as needed. - Add a 'has_hti' device info flag to track whether we should readout HDPORT_STATE or not. We can skip the platform/flag tests later since the hti_state in dev_priv will remain 0 for platforms it does not apply to. - Move PLL masking into icl_get_combo_phy_dpll() since at the moment RKL is the only platform that has HTI. (Jose) Bspec: 49189 Bspec: 53707 Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200716220551.2730644-5-matthew.d.roper@intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e4f7f6518945..56dfc6d98caa 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1045,6 +1045,14 @@ struct drm_i915_private {
struct intel_l3_parity l3_parity;
/*
+ * HTI (aka HDPORT) state read during initial hw readout. Most
+ * platforms don't have HTI, so this will just stay 0. Those that do
+ * will use this later to figure out which PLLs and PHYs are unavailable
+ * for driver usage.
+ */
+ u32 hti_state;
+
+ /*
* edram size in MB.
* Cannot be determined by PCIID. You must always read a register.
*/