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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-09-19 15:31:36 +0400 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-09-21 14:19:53 +0400 |
| commit | 77f01230223a08792f5320ebba27af9cbb81b0cf (patch) | |
| tree | 26781f9316514cabec7b8cd449827dc04cb349b1 /drivers/gpu/drm/i915/i915_drv.c | |
| parent | 9375e446e7f43be9a7c21e246cee35ea912532ec (diff) | |
| download | linux-77f01230223a08792f5320ebba27af9cbb81b0cf.tar.xz | |
drm/i915: Clear GPU read domains on reset
Clear the GPU read domain for the inactive objects on a reset so that
they are correctly invalidated on reuse.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index cb1ddc6af6a6..38e889bfd99c 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -391,6 +391,11 @@ int i965_reset(struct drm_device *dev, u8 flags) */ i915_gem_reset_flushing_list(dev); + /* Move everything out of the GPU domains to ensure we do any + * necessary invalidation upon reuse. + */ + i915_gem_reset_inactive_gpu_domains(dev); + /* * Set the domains we want to reset (GRDOM/bits 2 and 3) as * well as the reset bit (GR/bit 0). Setting the GR bit |