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authorLinus Torvalds <torvalds@linux-foundation.org>2009-11-04 18:05:43 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2009-11-04 18:05:43 +0300
commit91d3f9bacdb4950d2f79fe2ba296aa249f60d06c (patch)
tree3409f69ef76a28734a492af8803ea9653ee0b4a8 /drivers/gpu/drm/i915/i915_dma.c
parent51bb296b09a83ee1aae025778db38f9d2cc7bb1a (diff)
parent4204878179c99d419d392d78d817729992b4c442 (diff)
downloadlinux-91d3f9bacdb4950d2f79fe2ba296aa249f60d06c.tar.xz
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: drm/i915: Ironlake suspend/resume support drm/i915: kill warning in intel_find_pll_g4x_dp drm/i915: update watermarks before enabling PLLs drm/i915: add FIFO watermark support for G4x drm/i915: quiet DP i2c init drm/i915: fix panel fitting filter coefficient select for Ironlake drm/i915: fix to setup display reference clock control on Ironlake drm/i915: Install a fence register for fbc on g4x drm/i915: save/restore BLC histogram control reg across suspend/resume drm/i915: Fix FDI M/N setting according with correct color depth drm/i915: disable powersave feature for Ironlake currently drm/i915: Fix render reclock availability detection. drm/i915: Save and restore the GM45 FBC regs on suspend and resume. drm/i915: Set the LVDS_BORDER when using LVDS scaling mode drm/i915: disable FBC for Pineview, fixing a boot hang.
Diffstat (limited to 'drivers/gpu/drm/i915/i915_dma.c')
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 92aeb918e0c0..e5b138be45fa 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1227,8 +1227,7 @@ static int i915_load_modeset_init(struct drm_device *dev,
goto out;
/* Try to set up FBC with a reasonable compressed buffer size */
- if (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev) || IS_GM45(dev)) &&
- i915_powersave) {
+ if (I915_HAS_FBC(dev) && i915_powersave) {
int cfb_size;
/* Try to get an 8M buffer... */