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authorStuart Summers <stuart.summers@intel.com>2019-05-24 18:40:19 +0300
committerManasi Navare <manasi.d.navare@intel.com>2019-05-28 21:18:17 +0300
commit135a63b68250b8ab2ed854f0c907d5ff2a56f09e (patch)
treec4fb86e15e93061e7582fbecb389ebb79d38d8e7 /drivers/gpu/drm/i915/gt/intel_sseu.h
parentbd41ca49a2735eb2f016a3fa4fe9716b56b55d71 (diff)
downloadlinux-135a63b68250b8ab2ed854f0c907d5ff2a56f09e.tar.xz
drm/i915: Add macro for SSEU stride calculation
Subslice stride and EU stride are calculated multiple times in i915_query. Move this calculation to a macro to reduce code duplication. v2: update headers in intel_sseu.h v3: use GEN_SSEU_STRIDE for stride calculations in intel_sseu.h apply s/bits/max_entries/ to GEN_SSEU_STRIDE parameter Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Stuart Summers <stuart.summers@intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190524154022.13575-3-stuart.summers@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_sseu.h')
-rw-r--r--drivers/gpu/drm/i915/gt/intel_sseu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.h b/drivers/gpu/drm/i915/gt/intel_sseu.h
index 73bc824094e8..d20b7f96907d 100644
--- a/drivers/gpu/drm/i915/gt/intel_sseu.h
+++ b/drivers/gpu/drm/i915/gt/intel_sseu.h
@@ -8,11 +8,13 @@
#define __INTEL_SSEU_H__
#include <linux/types.h>
+#include <linux/kernel.h>
struct drm_i915_private;
#define GEN_MAX_SLICES (6) /* CNL upper bound */
#define GEN_MAX_SUBSLICES (8) /* ICL upper bound */
+#define GEN_SSEU_STRIDE(max_entries) DIV_ROUND_UP(max_entries, BITS_PER_BYTE)
struct sseu_dev_info {
u8 slice_mask;