diff options
| author | José Roberto de Souza <jose.souza@intel.com> | 2021-04-18 03:21:22 +0300 |
|---|---|---|
| committer | José Roberto de Souza <jose.souza@intel.com> | 2021-05-11 22:28:51 +0300 |
| commit | 78b772e1a01f699fbbcaa59d7a298aabe66a9b21 (patch) | |
| tree | a7d40a07287aacc87cab77dba3bbc1d631c8f9e5 /drivers/gpu/drm/i915/display/intel_psr.h | |
| parent | 388b863509f76f6a5ecedd7ffdaf184aa813241e (diff) | |
| download | linux-78b772e1a01f699fbbcaa59d7a298aabe66a9b21.tar.xz | |
drm/i915/display: Fill PSR state during hardware configuration read out
So far if we had a mismatch between the state asked and what was
programmed in hardware for PSR, this mismatch would go unnoticed.
So here adding the PSR to the hardware configuration readout,
EDP_PSR_CTL and EDP_PSR2_CTL can't be directly read because its state
flips due to other factors like frontbuffer modifications and CRC.
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210418002126.87882-1-jose.souza@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_psr.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_psr.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h index 0491a49ffd50..e3db85e97f4c 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.h +++ b/drivers/gpu/drm/i915/display/intel_psr.h @@ -17,6 +17,7 @@ struct intel_crtc; struct intel_atomic_state; struct intel_plane_state; struct intel_plane; +struct intel_encoder; void intel_psr_init_dpcd(struct intel_dp *intel_dp); void intel_psr_enable(struct intel_dp *intel_dp, @@ -37,6 +38,8 @@ void intel_psr_flush(struct drm_i915_private *dev_priv, void intel_psr_init(struct intel_dp *intel_dp); void intel_psr_compute_config(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state); +void intel_psr_get_config(struct intel_encoder *encoder, + struct intel_crtc_state *pipe_config); void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir); void intel_psr_short_pulse(struct intel_dp *intel_dp); void intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state); |