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authorImre Deak <imre.deak@intel.com>2023-03-23 17:20:32 +0300
committerImre Deak <imre.deak@intel.com>2023-04-03 11:35:31 +0300
commit3acac2d06a7e0f0b182b86b25bb8a2e9b3300406 (patch)
tree5fb0f3c2c8cb8ebdfe19e5e73c630304b923c449 /drivers/gpu/drm/i915/display/intel_display.c
parent9796a5b2725d1b3ddbbe7b1f3dec56af8cc6af22 (diff)
downloadlinux-3acac2d06a7e0f0b182b86b25bb8a2e9b3300406.tar.xz
drm/i915: Move shared DPLL disabling into CRTC disable hook
The spec requires disabling the PLL on TC ports before disconnecting the port's PHY. Prepare for that by moving the PLL disabling to the CRTC disable hook, while disconnecting the PHY will be moved to the post_pll_disable() encoder hook in the next patch. v2: Move the call from intel_crtc_disable_noatomic() as well. Reviewed-by: Mika Kahola <mika.kahola@intel.com> # v1 Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-27-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_display.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index b53a1d969344..1ed584d04c10 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1905,6 +1905,8 @@ static void ilk_crtc_disable(struct intel_atomic_state *state,
intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
+
+ intel_disable_shared_dpll(old_crtc_state);
}
static void hsw_crtc_disable(struct intel_atomic_state *state,
@@ -1923,6 +1925,8 @@ static void hsw_crtc_disable(struct intel_atomic_state *state,
intel_encoders_post_disable(state, crtc);
}
+ intel_disable_shared_dpll(old_crtc_state);
+
intel_dmc_disable_pipe(i915, crtc->pipe);
}
@@ -7041,7 +7045,6 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
dev_priv->display.funcs.display->crtc_disable(state, crtc);
crtc->active = false;
intel_fbc_disable(crtc);
- intel_disable_shared_dpll(old_crtc_state);
if (!new_crtc_state->hw.active)
intel_initial_watermarks(state, crtc);