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author | Chris Wilson <chris@chris-wilson.co.uk> | 2017-02-22 14:40:48 +0300 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2017-02-22 15:12:15 +0300 |
commit | 57822dc6b9cfeb5300e467ff83d8371aead90047 (patch) | |
tree | fd2cda9d94247ffc3ab1cec90780883ca76404e0 /drivers/gpu/drm/i915/Makefile | |
parent | f6aaba4dfbc8eaa1b2b756b989fb423a789ee4e8 (diff) | |
download | linux-57822dc6b9cfeb5300e467ff83d8371aead90047.tar.xz |
drm/i915: Perform object clflushing asynchronously
Flushing the cachelines for an object is slow, can be as much as 100ms
for a large framebuffer. We currently do this under the struct_mutex BKL
on execution or on pageflip. But now with the ability to add fences to
obj->resv for both flips and execbuf (and we naturally wait on the fence
before CPU access), we can move the clflush operation to a workqueue and
signal a fence for completion, thereby doing the work asynchronously and
not blocking the driver or its clients.
v2: Introduce i915_gem_clflush.h and use a new name, split out some
extras into separate patches.
Suggested-by: Akash Goel <akash.goel@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170222114049.28456-5-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/Makefile')
-rw-r--r-- | drivers/gpu/drm/i915/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index d0c9577c7533..53e30fcb2751 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -29,6 +29,7 @@ i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o intel_pipe_crc.o # GEM code i915-y += i915_cmd_parser.o \ i915_gem_batch_pool.o \ + i915_gem_clflush.o \ i915_gem_context.o \ i915_gem_dmabuf.o \ i915_gem_evict.o \ |