diff options
| author | Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2016-03-16 13:57:14 +0300 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2016-03-21 21:39:08 +0300 |
| commit | 8563b1e8ef88c8bdb824ab1c00ebb7d66308fef0 (patch) | |
| tree | 90ef6e9d589530e1d590bb4928e2a9e573efc4bb /drivers/gpu/drm/i915/Makefile | |
| parent | 2e85ab4fed5762f86ae12c0347e64b89412191ca (diff) | |
| download | linux-8563b1e8ef88c8bdb824ab1c00ebb7d66308fef0.tar.xz | |
drm/i915: Extract out gamma table and CSC to their own file
The moves a couple of functions programming the gamma LUT and CSC
units into their own file.
On generations prior to Haswell there is only a gamma LUT. From
haswell on there is also a new enhanced color correction unit that
isn't used yet. This is why we need to set the GAMMA_MODE register,
either we're using the legacy 8bits LUT or enhanced LUTs (of 10 or
12bits).
The CSC unit is only available from Haswell on.
We also need to make a special case for CherryView which is recognized
as a gen 8 but doesn't have the same enhanced color correction unit
from Haswell on.
v2: Fix access to GAMMA_MODE register on older generations than
Haswell (from Matt Roper's comments)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1458125837-2576-2-git-send-email-lionel.g.landwerlin@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/Makefile')
| -rw-r--r-- | drivers/gpu/drm/i915/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 5558a0312558..7ffb51b0cbc2 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -55,6 +55,7 @@ i915-y += intel_audio.o \ intel_atomic.o \ intel_atomic_plane.o \ intel_bios.o \ + intel_color.o \ intel_display.o \ intel_dpll_mgr.o \ intel_fbc.o \ |