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author | Andrzej Hajda <a.hajda@samsung.com> | 2017-02-01 10:47:52 +0300 |
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committer | Archit Taneja <architt@codeaurora.org> | 2017-02-02 12:45:31 +0300 |
commit | 45d0ea86d235251305a0e2e63485b08b5caa79e7 (patch) | |
tree | c5aec94e594ddad3e453a075d0734931fcd6a7fc /drivers/gpu/drm/bridge | |
parent | 9fc6ade810c0ad4f72d77525444fbe925716e7fc (diff) | |
download | linux-45d0ea86d235251305a0e2e63485b08b5caa79e7.tar.xz |
drm/bridge/sii8620: enable interlace modes
Bug in DECON(CRTC) driver prevented interlace modes from proper work.
Since DECON is fixed interlace modes can be enabled in MHL.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1485935272-17337-26-git-send-email-a.hajda@samsung.com
Diffstat (limited to 'drivers/gpu/drm/bridge')
-rw-r--r-- | drivers/gpu/drm/bridge/sil-sii8620.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/bridge/sil-sii8620.c index dae94899ac45..cdd0a9d44ba1 100644 --- a/drivers/gpu/drm/bridge/sil-sii8620.c +++ b/drivers/gpu/drm/bridge/sil-sii8620.c @@ -2115,9 +2115,6 @@ static bool sii8620_mode_fixup(struct drm_bridge *bridge, int max_lclk; bool ret = true; - if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) - return false; - mutex_lock(&ctx->lock); max_lclk = sii8620_is_mhl3(ctx) ? MHL3_MAX_LCLK : MHL1_MAX_LCLK; |