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author | Russell King <rmk+kernel@armlinux.org.uk> | 2018-07-01 17:46:54 +0300 |
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committer | Russell King <rmk+kernel@armlinux.org.uk> | 2019-05-17 14:16:32 +0300 |
commit | 5d32b660c839706fd9a3d4b0e65cb648bc07032d (patch) | |
tree | 14f9b21cc54eabac5c81c0552010de8867ca2084 /drivers/gpu/drm/armada/armada_crtc.c | |
parent | d0d765dec6b7e6dc5d6c153784f1a80a1f5bf3c5 (diff) | |
download | linux-5d32b660c839706fd9a3d4b0e65cb648bc07032d.tar.xz |
drm/armada: add comments about HWC32 cursor colour format
Add some comments about the format of the HWC32 cursor colour format.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'drivers/gpu/drm/armada/armada_crtc.c')
-rw-r--r-- | drivers/gpu/drm/armada/armada_crtc.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/armada/armada_crtc.c b/drivers/gpu/drm/armada/armada_crtc.c index 5991feb1bcc9..e81e57823b66 100644 --- a/drivers/gpu/drm/armada/armada_crtc.c +++ b/drivers/gpu/drm/armada/armada_crtc.c @@ -515,6 +515,13 @@ static void armada_load_cursor_argb(void __iomem *base, uint32_t *pix, for (x = 0; x < width; x++, p++) { uint32_t val = *p; + /* + * In "ARGB888" (HWC32) mode, writing to the SRAM + * requires these bits to contain: + * 31:24 = alpha 23:16 = blue 15:8 = green 7:0 = red + * So, it's actually ABGR8888. This is independent + * of the SWAPRB bits in DMA control register 0. + */ val = (val & 0xff00ff00) | (val & 0x000000ff) << 16 | (val & 0x00ff0000) >> 16; |