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authorTimur Kristóf <timur.kristof@gmail.com>2025-09-09 17:17:50 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2026-03-25 13:08:46 +0300
commitc179bece52fd29ebd4e6a52f1695c03879dd2034 (patch)
tree52fe9322156e191ef7eb8ede88df641bef9d49cc /drivers/gpu/drm/amd/include
parentb0e9965cebf9fb52a3a1e9a1a23aa0a0ab353bc7 (diff)
downloadlinux-c179bece52fd29ebd4e6a52f1695c03879dd2034.tar.xz
drm/amd/display: Add pixel_clock to amd_pp_display_configuration
commit b515dcb0dc4e85d8254f5459cfb32fce88dacbfb upstream. This commit adds the pixel_clock field to the display config struct so that power management (DPM) can use it. We currently don't have a proper bandwidth calculation on old GPUs with DCE 6-10 because dce_calcs only supports DCE 11+. So the power management (DPM) on these GPUs may need to make ad-hoc decisions for display based on the pixel clock. Also rename sym_clock to pixel_clock in dm_pp_single_disp_config to avoid confusion with other code where the sym_clock refers to the DisplayPort symbol clock. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rosen Penev <rosenp@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/gpu/drm/amd/include')
-rw-r--r--drivers/gpu/drm/amd/include/dm_pp_interface.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/include/dm_pp_interface.h b/drivers/gpu/drm/amd/include/dm_pp_interface.h
index acd1cef61b7c..349544504c93 100644
--- a/drivers/gpu/drm/amd/include/dm_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/dm_pp_interface.h
@@ -65,6 +65,7 @@ struct single_display_configuration {
uint32_t view_resolution_cy;
enum amd_pp_display_config_type displayconfigtype;
uint32_t vertical_refresh; /* for active display */
+ uint32_t pixel_clock; /* Pixel clock in KHz (for HDMI only: normalized) */
};
#define MAX_NUM_DISPLAY 32