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authorTaimur Hassan <Syed.Hassan@amd.com>2025-08-22 23:13:17 +0300
committerAlex Deucher <alexander.deucher@amd.com>2025-08-29 17:23:09 +0300
commit5e610ed48a0df10aabd4fa17d7cee012dddf21e4 (patch)
tree31f45c0051b1097bfc4cf94170e9571ce74624c8 /drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
parent16f2e14ee9429586dd58dc7ac1f5fc0755a0a0c6 (diff)
downloadlinux-5e610ed48a0df10aabd4fa17d7cee012dddf21e4.tar.xz
drm/amd/display: [FW Promotion] Release 0.1.25.0
Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h')
-rw-r--r--drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h13
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index b7d49a117fa7..02a4a20e3560 100644
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -2364,6 +2364,7 @@ struct dmub_cmd_fams2_global_config {
union dmub_fams2_global_feature_config features;
uint32_t recovery_timeout_us;
uint32_t hwfq_flip_programming_delay_us;
+ uint32_t max_allow_to_target_delta_us; // how early DCN could assert P-State allow compared to the P-State target
};
union dmub_cmd_fams2_config {
@@ -4171,6 +4172,12 @@ enum replay_version {
*/
struct dmub_cmd_replay_set_version_data {
/**
+ * Panel Instance.
+ * Panel instance to identify which psr_state to use
+ * Currently the support is only for 0 or 1
+ */
+ uint8_t panel_inst;
+ /**
* PSR version that FW should implement.
*/
enum replay_version version;
@@ -4179,12 +4186,6 @@ struct dmub_cmd_replay_set_version_data {
*/
uint8_t cmd_version;
/**
- * Panel Instance.
- * Panel instance to identify which psr_state to use
- * Currently the support is only for 0 or 1
- */
- uint8_t panel_inst;
- /**
* Explicit padding to 4 byte boundary.
*/
uint8_t pad[2];