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| author | Alex Deucher <alexander.deucher@amd.com> | 2020-11-02 23:37:34 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-11-05 01:11:37 +0300 |
| commit | 20f2ffe504728612d7b0c34e4f8280e34251e704 (patch) | |
| tree | ab97de569be30e009ba6e5087f3f6c775167e46c /drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h | |
| parent | aeee2a48ec9239790b7c9a5c14dfb2a12554322f (diff) | |
| download | linux-20f2ffe504728612d7b0c34e4f8280e34251e704.tar.xz | |
drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)
Avoids confusion in configurations.
v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled
v3: rebase on latest code
Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h index 3407e5da5534..ec28cb9c3a8e 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h @@ -72,14 +72,14 @@ enum wbscl_coef_filter_type_sel { }; -#if defined(CONFIG_DRM_AMD_DC_DCN3_0) +#if defined(CONFIG_DRM_AMD_DC_DCN) enum dwb_boundary_mode { DWBSCL_BOUNDARY_MODE_EDGE = 0, DWBSCL_BOUNDARY_MODE_BLACK = 1 }; #endif -#if defined(CONFIG_DRM_AMD_DC_DCN3_0) +#if defined(CONFIG_DRM_AMD_DC_DCN) enum dwb_output_csc_mode { DWB_OUTPUT_CSC_DISABLE = 0, DWB_OUTPUT_CSC_COEF_A = 1, @@ -209,7 +209,7 @@ struct dwbc_funcs { struct dwb_warmup_params *warmup_params); -#if defined(CONFIG_DRM_AMD_DC_DCN3_0) +#if defined(CONFIG_DRM_AMD_DC_DCN) void (*dwb_program_output_csc)( struct dwbc *dwbc, |