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| author | Michael Strauss <michael.strauss@amd.com> | 2021-09-01 20:49:37 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-09-14 22:57:11 +0300 |
| commit | 3da35006fef89d15d101622445d7f4760953a5f1 (patch) | |
| tree | 7a9c5c1a9a2542c80a8379a322d468a7f13b49cf /drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h | |
| parent | 0c55b63ba3a76673ee21bc1b82c4a33f091ff908 (diff) | |
| download | linux-3da35006fef89d15d101622445d7f4760953a5f1.tar.xz | |
drm/amd/display: Enable mem low power control for DCN3.1 sub-IP blocks
[WHY]
Sequences to handle powering down these sub-IP blocks are now ready for use
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Mikita Lipski <mikita.lipski@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h')
0 files changed, 0 insertions, 0 deletions