diff options
| author | Christian König <christian.koenig@amd.com> | 2016-03-01 18:46:18 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2016-05-05 03:19:24 +0300 |
| commit | 41d9eb2c5a2a21c9120e906d077e77562883510e (patch) | |
| tree | 6adb5a48873d307ba2911cdd8e1b94419a00d9ba /drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | |
| parent | 832a902f9433b812f829e9f2257daf5d518cf0de (diff) | |
| download | linux-41d9eb2c5a2a21c9120e906d077e77562883510e.tar.xz | |
drm/amdgpu: add a fence after the VM flush
This way we can track when the flush is done.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 26 |
1 files changed, 21 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index d0cce7c3129a..252445f578f6 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -236,6 +236,9 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring, fence_put(id->first); id->first = fence_get(fence); + fence_put(id->last_flush); + id->last_flush = NULL; + fence_put(id->flushed_updates); id->flushed_updates = fence_get(updates); @@ -263,11 +266,11 @@ error: * * Emit a VM flush when it is necessary. */ -void amdgpu_vm_flush(struct amdgpu_ring *ring, - unsigned vm_id, uint64_t pd_addr, - uint32_t gds_base, uint32_t gds_size, - uint32_t gws_base, uint32_t gws_size, - uint32_t oa_base, uint32_t oa_size) +int amdgpu_vm_flush(struct amdgpu_ring *ring, + unsigned vm_id, uint64_t pd_addr, + uint32_t gds_base, uint32_t gds_size, + uint32_t gws_base, uint32_t gws_size, + uint32_t oa_base, uint32_t oa_size) { struct amdgpu_device *adev = ring->adev; struct amdgpu_vm_id *id = &adev->vm_manager.ids[vm_id]; @@ -278,14 +281,25 @@ void amdgpu_vm_flush(struct amdgpu_ring *ring, id->gws_size != gws_size || id->oa_base != oa_base || id->oa_size != oa_size); + int r; if (ring->funcs->emit_pipeline_sync && ( pd_addr != AMDGPU_VM_NO_FLUSH || gds_switch_needed)) amdgpu_ring_emit_pipeline_sync(ring); if (pd_addr != AMDGPU_VM_NO_FLUSH) { + struct fence *fence; + trace_amdgpu_vm_flush(pd_addr, ring->idx, vm_id); amdgpu_ring_emit_vm_flush(ring, vm_id, pd_addr); + r = amdgpu_fence_emit(ring, &fence); + if (r) + return r; + + mutex_lock(&adev->vm_manager.lock); + fence_put(id->last_flush); + id->last_flush = fence; + mutex_unlock(&adev->vm_manager.lock); } if (gds_switch_needed) { @@ -300,6 +314,8 @@ void amdgpu_vm_flush(struct amdgpu_ring *ring, gws_base, gws_size, oa_base, oa_size); } + + return 0; } /** |