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authorAlex Deucher <alexander.deucher@amd.com>2016-02-04 18:21:23 +0300
committerAlex Deucher <alexander.deucher@amd.com>2016-02-08 18:37:41 +0300
commitcd474ba0d6048aeefe6f1066a6bfb5eac36a2a81 (patch)
tree4854307a6b0b4be42ee7885f27597ca652b51048 /drivers/gpu/drm/amd/amdgpu/amdgpu.h
parent6739b3d7bc18a5373efd863b11831e8f515fffe1 (diff)
downloadlinux-cd474ba0d6048aeefe6f1066a6bfb5eac36a2a81.tar.xz
drm/amdgpu: add pcie cap module parameters (v2)
Allows the user to force the supported pcie gen and lane config on both the asic and the chipset. Useful for debugging pcie problems and for virtualization where we may not be able to query the pcie bridge caps. Default to: gen: chipset 1/2, asic 1/2/3 lanes: 1/2/4/8/16 v2: fix bare metal case Reviewed-by: monk liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 82edf95b7740..4021c8a97fc7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -87,6 +87,8 @@ extern int amdgpu_sched_jobs;
extern int amdgpu_sched_hw_submission;
extern int amdgpu_enable_semaphores;
extern int amdgpu_powerplay;
+extern unsigned amdgpu_pcie_gen_cap;
+extern unsigned amdgpu_pcie_lane_cap;
#define AMDGPU_WAIT_IDLE_TIMEOUT_IN_MS 3000
#define AMDGPU_MAX_USEC_TIMEOUT 100000 /* 100 ms */