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| author | Hyun Kwon <hyun.kwon@xilinx.com> | 2018-07-08 05:05:34 +0300 |
|---|---|---|
| committer | Laurent Pinchart <laurent.pinchart@ideasonboard.com> | 2020-07-18 02:59:16 +0300 |
| commit | d76271d22694e874ed70791702db9252ffe96a4c (patch) | |
| tree | 6ea2fe2fb984f28855b881e1ed784269b1038290 /drivers/gpu/drm/Makefile | |
| parent | e7c7970a678d5ca945663e9f211e4dc636ccbd52 (diff) | |
| download | linux-d76271d22694e874ed70791702db9252ffe96a4c.tar.xz | |
drm: xlnx: DRM/KMS driver for Xilinx ZynqMP DisplayPort Subsystem
The Xilinx ZynqMP SoC has a hardened display pipeline named DisplayPort
Subsystem. It includes a buffer manager, a video pipeline renderer
(blender), an audio mixer and a DisplayPort source controller
(transmitter). The DMA engine the provide data to the buffer manager, as
well as the DisplayPort PHYs that drive the lanes, are external to the
subsystem and interfaced using the DMA engine and PHY APIs respectively.
This driver supports the DisplayPort Subsystem and implements
- Two planes, for graphics and video
- One CRTC that supports alpha blending
- One encoder for the DisplayPort transmitter
- One connector for an external monitor
It currently doesn't support
- Color keying
- Test pattern generation
- Audio
- Live input from the Programmable Logic (FPGA)
- Output to the Programmable Logic (FPGA)
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Diffstat (limited to 'drivers/gpu/drm/Makefile')
| -rw-r--r-- | drivers/gpu/drm/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile index 2c0e5a7e5953..1465b746f1f3 100644 --- a/drivers/gpu/drm/Makefile +++ b/drivers/gpu/drm/Makefile @@ -123,3 +123,4 @@ obj-$(CONFIG_DRM_PANFROST) += panfrost/ obj-$(CONFIG_DRM_ASPEED_GFX) += aspeed/ obj-$(CONFIG_DRM_MCDE) += mcde/ obj-$(CONFIG_DRM_TIDSS) += tidss/ +obj-y += xlnx/ |