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author | Matthew Gerlach <matthew.gerlach@linux.intel.com> | 2017-03-24 03:34:30 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-04-08 18:45:28 +0300 |
commit | 5b73cb5b0167833347fa0ce5525cfb488b2e2290 (patch) | |
tree | f69b9d2753855e048b1a4101c090e0d525aa2c45 /drivers/fpga/altera-pr-ip-core-plat.c | |
parent | 6e761cd77b5c88ce2817d34088b7762aa40e1fd6 (diff) | |
download | linux-5b73cb5b0167833347fa0ce5525cfb488b2e2290.tar.xz |
fpga pr ip: Platform driver for Altera Partial Reconfiguration IP.
This adds a platform bus driver for a fpga-mgr driver
that uses the Altera Partial Reconfiguration IP component.
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Acked-by: Alan Tull <atull@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/fpga/altera-pr-ip-core-plat.c')
-rw-r--r-- | drivers/fpga/altera-pr-ip-core-plat.c | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/drivers/fpga/altera-pr-ip-core-plat.c b/drivers/fpga/altera-pr-ip-core-plat.c new file mode 100644 index 000000000000..8fb36b8b4648 --- /dev/null +++ b/drivers/fpga/altera-pr-ip-core-plat.c @@ -0,0 +1,68 @@ +/* + * Driver for Altera Partial Reconfiguration IP Core + * + * Copyright (C) 2016-2017 Intel Corporation + * + * Based on socfpga-a10.c Copyright (C) 2015-2016 Altera Corporation + * by Alan Tull <atull@opensource.altera.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ +#include <linux/fpga/altera-pr-ip-core.h> +#include <linux/module.h> +#include <linux/of_device.h> + +static int alt_pr_platform_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + void __iomem *reg_base; + struct resource *res; + + /* First mmio base is for register access */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + + reg_base = devm_ioremap_resource(dev, res); + + if (IS_ERR(reg_base)) + return PTR_ERR(reg_base); + + return alt_pr_register(dev, reg_base); +} + +static int alt_pr_platform_remove(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + + return alt_pr_unregister(dev); +} + +static const struct of_device_id alt_pr_of_match[] = { + { .compatible = "altr,a10-pr-ip", }, + {}, +}; + +MODULE_DEVICE_TABLE(of, alt_pr_of_match); + +static struct platform_driver alt_pr_platform_driver = { + .probe = alt_pr_platform_probe, + .remove = alt_pr_platform_remove, + .driver = { + .name = "alt_a10_pr_ip", + .of_match_table = alt_pr_of_match, + }, +}; + +module_platform_driver(alt_pr_platform_driver); +MODULE_AUTHOR("Matthew Gerlach <matthew.gerlach@linux.intel.com>"); +MODULE_DESCRIPTION("Altera Partial Reconfiguration IP Platform Driver"); +MODULE_LICENSE("GPL v2"); |