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| author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-09-03 22:57:04 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-09-03 22:57:04 +0300 |
| commit | 526af040548791c4693e985afff876d9e6704b20 (patch) | |
| tree | 2dba8a144c89edf2cc4e85d5805f526b98451a60 /drivers/fpga/Kconfig | |
| parent | 18ec9392929fd87df0aaa12ddb954483114a1073 (diff) | |
| parent | e58915179f3f4a839ea3b9aeae1c1e13e98e33b1 (diff) | |
| download | linux-526af040548791c4693e985afff876d9e6704b20.tar.xz | |
Merge tag 'fpga-cvp-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga into char-misc-next
Moritz writes:
FPGA Manager changes for 5.4-rc1
Here is the second set of changes for the 5.4 merge window.
This patchset adds support for the v2 revision of Intel (Altera)'s CVP
parts including the Stratix 10.
All of this patches have been reviewed and been in the last few
linux-next releases without issues.
Signed-off-by: Moritz Fischer <mdf@kernel.org>
* tag 'fpga-cvp-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga:
fpga: altera-cvp: Add Stratix10 (V2) Support
fpga: altera-cvp: Preparation for V2 parts.
fpga: altera-cvp: Discover Vendor Specific offset
Diffstat (limited to 'drivers/fpga/Kconfig')
| -rw-r--r-- | drivers/fpga/Kconfig | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index cdd4f73b4869..73c779e920ed 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -46,11 +46,11 @@ config FPGA_MGR_ALTERA_PS_SPI using the passive serial interface over SPI. config FPGA_MGR_ALTERA_CVP - tristate "Altera Arria-V/Cyclone-V/Stratix-V CvP FPGA Manager" + tristate "Altera CvP FPGA Manager" depends on PCI help - FPGA manager driver support for Arria-V, Cyclone-V, Stratix-V - and Arria 10 Altera FPGAs using the CvP interface over PCIe. + FPGA manager driver support for Arria-V, Cyclone-V, Stratix-V, + Arria 10 and Stratix10 Altera FPGAs using the CvP interface over PCIe. config FPGA_MGR_ZYNQ_FPGA tristate "Xilinx Zynq FPGA" |