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author | Clemens Ladisch <clemens@ladisch.de> | 2010-06-10 10:33:07 +0400 |
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committer | Clemens Ladisch <clemens@ladisch.de> | 2010-06-10 10:33:07 +0400 |
commit | a48777e03ad53777ed119a5f86dd22a6c5a378ad (patch) | |
tree | 651a3fb567a2b9d6ab111ff07415d87397ba8202 /drivers/firewire/core-transaction.c | |
parent | 9ab5071cd4a16001e4ba790172a7da5e4172462b (diff) | |
download | linux-a48777e03ad53777ed119a5f86dd22a6c5a378ad.tar.xz |
firewire: add CSR BUS_TIME support
Implement the BUS_TIME register, which is required for cycle master
capable nodes and tested for by the Base 1393 Test Suite. Even when
there is not yet bus master initialization support, this register allows
us to work together with other bus masters.
Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
Diffstat (limited to 'drivers/firewire/core-transaction.c')
-rw-r--r-- | drivers/firewire/core-transaction.c | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/drivers/firewire/core-transaction.c b/drivers/firewire/core-transaction.c index e3925f67ec12..2a390726fa76 100644 --- a/drivers/firewire/core-transaction.c +++ b/drivers/firewire/core-transaction.c @@ -1104,6 +1104,17 @@ static void handle_registers(struct fw_card *card, struct fw_request *request, rcode = RCODE_TYPE_ERROR; break; + case CSR_BUS_TIME: + if (tcode == TCODE_READ_QUADLET_REQUEST) + *data = cpu_to_be32(card->driver-> + read_csr_reg(card, CSR_BUS_TIME)); + else if (tcode == TCODE_WRITE_QUADLET_REQUEST) + card->driver->write_csr_reg(card, CSR_BUS_TIME, + be32_to_cpu(*data)); + else + rcode = RCODE_TYPE_ERROR; + break; + case CSR_BROADCAST_CHANNEL: if (tcode == TCODE_READ_QUADLET_REQUEST) *data = cpu_to_be32(card->broadcast_channel); @@ -1132,9 +1143,6 @@ static void handle_registers(struct fw_card *card, struct fw_request *request, case CSR_BUSY_TIMEOUT: /* FIXME: Implement this. */ - case CSR_BUS_TIME: - /* Useless without initialization by the bus manager. */ - default: rcode = RCODE_ADDRESS_ERROR; break; |