diff options
author | Ingo Molnar <mingo@elte.hu> | 2009-10-01 18:14:32 +0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-10-02 17:42:18 +0400 |
commit | f436f8bb73138bc74eb1c6527723e00988ad8a8a (patch) | |
tree | 834bd21c6d8daff79328582e429146417c262270 /drivers/edac | |
parent | 24e35800cdc4350fc34e2bed37b608a9e13ab3b6 (diff) | |
download | linux-f436f8bb73138bc74eb1c6527723e00988ad8a8a.tar.xz |
x86: EDAC: MCE: Fix MCE decoding callback logic
Make decoding of MCEs happen only on AMD hardware by registering a
non-default callback only on CPU families which support it.
While looking at the interaction of decode_mce() with the other MCE
code i also noticed a few other things and made the following
cleanups/fixes:
- Fixed the mce_decode() weak alias - a weak alias is really not
good here, it should be a proper callback. A weak alias will be
overriden if a piece of code is built into the kernel - not
good, obviously.
- The patch initializes the callback on AMD family 10h and 11h.
- Added the more correct fallback printk of:
No support for human readable MCE decoding on this CPU type.
Transcribe the message and run it through 'mcelog --ascii' to decode.
On CPUs that dont have a decoder.
- Made the surrounding code more readable.
Note that the callback allows us to have a default fallback -
without having to check the CPU versions during the printout
itself. When an EDAC module registers itself, it can install the
decode-print function.
(there's no unregister needed as this is core code.)
version -v2 by Borislav Petkov:
- add K8 to the set of supported CPUs
- always build in edac_mce_amd since we use an early_initcall now
- fix checkpatch warnings
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andi Kleen <andi@firstfloor.org>
LKML-Reference: <20091001141432.GA11410@aftab>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers/edac')
-rw-r--r-- | drivers/edac/Makefile | 2 | ||||
-rw-r--r-- | drivers/edac/edac_mce_amd.c | 15 |
2 files changed, 15 insertions, 2 deletions
diff --git a/drivers/edac/Makefile b/drivers/edac/Makefile index 7a473bbe8abd..8701cd7ce4e3 100644 --- a/drivers/edac/Makefile +++ b/drivers/edac/Makefile @@ -18,7 +18,7 @@ edac_core-objs += edac_pci.o edac_pci_sysfs.o endif ifdef CONFIG_CPU_SUP_AMD -edac_core-objs += edac_mce_amd.o +obj-$(CONFIG_X86_MCE) += edac_mce_amd.o endif obj-$(CONFIG_EDAC_AMD76X) += amd76x_edac.o diff --git a/drivers/edac/edac_mce_amd.c b/drivers/edac/edac_mce_amd.c index 0c21c370c9dd..83a01a1187d7 100644 --- a/drivers/edac/edac_mce_amd.c +++ b/drivers/edac/edac_mce_amd.c @@ -362,7 +362,7 @@ static inline void amd_decode_err_code(unsigned int ec) pr_warning("Huh? Unknown MCE error 0x%x\n", ec); } -void decode_mce(struct mce *m) +static void amd_decode_mce(struct mce *m) { struct err_regs regs; int node, ecc; @@ -420,3 +420,16 @@ void decode_mce(struct mce *m) amd_decode_err_code(m->status & 0xffff); } + +static int __init mce_amd_init(void) +{ + /* + * We can decode MCEs for Opteron and later CPUs: + */ + if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && + (boot_cpu_data.x86 >= 0xf)) + x86_mce_decode_callback = amd_decode_mce; + + return 0; +} +early_initcall(mce_amd_init); |