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| author | Yazen Ghannam <yazen.ghannam@amd.com> | 2019-02-28 18:36:10 +0300 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2019-03-27 02:13:25 +0300 |
| commit | bdcee7747f5c490297665af0e1e0fbeb4368804d (patch) | |
| tree | fd79cb8c3a582226be66d7b1cbf74e3afef6b326 /drivers/edac/amd64_edac.h | |
| parent | 4d30d2bc3c23e63c2608bc5b03b0960490d5b740 (diff) | |
| download | linux-bdcee7747f5c490297665af0e1e0fbeb4368804d.tar.xz | |
EDAC/amd64: Support more than two Unified Memory Controllers
The first few models of Family 17h all had 2 Unified Memory Controllers
per Die, so this was treated as a fixed value. However, future systems
may have more Unified Memory Controllers per Die.
Related to this, the channel number and base address of a Unified Memory
Controller were found by matching on fixed, known values. However,
current and future systems follow this pattern for the channel number
and base address of a Unified Memory Controller: 0xYXXXXX, where Y is
the channel number. So matching on hardcoded values is not necessary.
Set the number of Unified Memory Controllers at driver init time based
on the family/model. Also, update the functions that find the channel
number and base address of a Unified Memory Controller to support more
than two.
[ bp: Move num_umcs into the .c file and simplify comment. ]
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Tested-by: Kim Phillips <kim.phillips@amd.com>
Cc: James Morse <james.morse@arm.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: https://lkml.kernel.org/r/20190228153558.127292-3-Yazen.Ghannam@amd.com
Diffstat (limited to 'drivers/edac/amd64_edac.h')
| -rw-r--r-- | drivers/edac/amd64_edac.h | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h index de8dbb0b42b5..88ca6dc2d5df 100644 --- a/drivers/edac/amd64_edac.h +++ b/drivers/edac/amd64_edac.h @@ -274,8 +274,6 @@ #define UMC_SDP_INIT BIT(31) -#define NUM_UMCS 2 - enum amd_families { K8_CPUS = 0, F10_CPUS, @@ -399,8 +397,8 @@ struct err_info { static inline u32 get_umc_base(u8 channel) { - /* ch0: 0x50000, ch1: 0x150000 */ - return 0x50000 + (!!channel << 20); + /* chY: 0xY50000 */ + return 0x50000 + (channel << 20); } static inline u64 get_dram_base(struct amd64_pvt *pvt, u8 i) |