diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2017-01-17 14:57:28 +0300 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2017-01-25 09:21:39 +0300 |
| commit | f4aa3183c36d2f32695b0e7f0ce7296568729830 (patch) | |
| tree | a470361ca794c3317875569ac4be467d19680c78 /drivers/dma | |
| parent | be242f4e2e551e55d1f76504a8adcb703e0127c3 (diff) | |
| download | linux-f4aa3183c36d2f32695b0e7f0ce7296568729830.tar.xz | |
dmaengine: dw: extract dwc_chan_pause() for future use
iDMA 32-bit has a special handling of the FIFO during pause() /
terminate_all(). Prepare code to implement that.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma')
| -rw-r--r-- | drivers/dma/dw/core.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c index e3749ec99016..4a558d5b8c52 100644 --- a/drivers/dma/dw/core.c +++ b/drivers/dma/dw/core.c @@ -927,22 +927,26 @@ static int dwc_config(struct dma_chan *chan, struct dma_slave_config *sconfig) return 0; } -static int dwc_pause(struct dma_chan *chan) +static void dwc_chan_pause(struct dw_dma_chan *dwc) { - struct dw_dma_chan *dwc = to_dw_dma_chan(chan); - unsigned long flags; unsigned int count = 20; /* timeout iterations */ u32 cfglo; - spin_lock_irqsave(&dwc->lock, flags); - cfglo = channel_readl(dwc, CFG_LO); channel_writel(dwc, CFG_LO, cfglo | DWC_CFGL_CH_SUSP); while (!(channel_readl(dwc, CFG_LO) & DWC_CFGL_FIFO_EMPTY) && count--) udelay(2); set_bit(DW_DMA_IS_PAUSED, &dwc->flags); +} +static int dwc_pause(struct dma_chan *chan) +{ + struct dw_dma_chan *dwc = to_dw_dma_chan(chan); + unsigned long flags; + + spin_lock_irqsave(&dwc->lock, flags); + dwc_chan_pause(dwc); spin_unlock_irqrestore(&dwc->lock, flags); return 0; |