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authorFrank Li <Frank.Li@nxp.com>2024-03-23 18:34:52 +0300
committerVinod Koul <vkoul@kernel.org>2024-04-07 14:50:00 +0300
commit9a5000cf70bcfcb5dd4e5b4bae0a01fb9bdf9fa1 (patch)
treec06d8a3772eba4a50a82fbf4793aa53251692cb8 /drivers/dma
parent6aa60f79e6794bbbc571ea4e0501b9fcc26026e2 (diff)
downloadlinux-9a5000cf70bcfcb5dd4e5b4bae0a01fb9bdf9fa1.tar.xz
dmaengine: fsl-edma: clean up chclk and FSL_EDMA_DRV_HAS_CHCLK
No device currently utilizes chclk and FSL_EDMA_DRV_HAS_CHCLK features. Removes these unused features. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240323-8ulp_edma-v3-3-c0e981027c05@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/fsl-edma-common.h2
-rw-r--r--drivers/dma/fsl-edma-main.c8
2 files changed, 0 insertions, 10 deletions
diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h
index 4cf1de9f0e51..532f647e540e 100644
--- a/drivers/dma/fsl-edma-common.h
+++ b/drivers/dma/fsl-edma-common.h
@@ -192,7 +192,6 @@ struct fsl_edma_desc {
#define FSL_EDMA_DRV_WRAP_IO BIT(3)
#define FSL_EDMA_DRV_EDMA64 BIT(4)
#define FSL_EDMA_DRV_HAS_PD BIT(5)
-#define FSL_EDMA_DRV_HAS_CHCLK BIT(6)
#define FSL_EDMA_DRV_HAS_CHMUX BIT(7)
/* imx8 QM audio edma remote local swapped */
#define FSL_EDMA_DRV_QUIRK_SWAPPED BIT(8)
@@ -237,7 +236,6 @@ struct fsl_edma_engine {
void __iomem *muxbase[DMAMUX_NR];
struct clk *muxclk[DMAMUX_NR];
struct clk *dmaclk;
- struct clk *chclk;
struct mutex fsl_edma_mutex;
const struct fsl_edma_drvdata *drvdata;
u32 n_chans;
diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c
index 2148a7f1ae84..41c71c360ff1 100644
--- a/drivers/dma/fsl-edma-main.c
+++ b/drivers/dma/fsl-edma-main.c
@@ -483,14 +483,6 @@ static int fsl_edma_probe(struct platform_device *pdev)
}
}
- if (drvdata->flags & FSL_EDMA_DRV_HAS_CHCLK) {
- fsl_edma->chclk = devm_clk_get_enabled(&pdev->dev, "mp");
- if (IS_ERR(fsl_edma->chclk)) {
- dev_err(&pdev->dev, "Missing MP block clock.\n");
- return PTR_ERR(fsl_edma->chclk);
- }
- }
-
ret = of_property_read_variable_u32_array(np, "dma-channel-mask", chan_mask, 1, 2);
if (ret > 0) {