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authorRadhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>2019-10-15 17:48:20 +0300
committerVinod Koul <vkoul@kernel.org>2019-10-20 17:05:27 +0300
commit95f68c62628085abff83a5add8db057fbf532f7f (patch)
tree5a81a1b1f1780210708ef699963365bb223058da /drivers/dma/xilinx
parent0f45e75e336f85aeee0392042e022814bf033aa2 (diff)
downloadlinux-95f68c62628085abff83a5add8db057fbf532f7f.tar.xz
dmaengine: xilinx_dma: Remove residue from channel data
There is no use of storing channel data residue field. So clean it up. In tx_status simply pass calculated residue to dma_set_residue. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Link: https://lore.kernel.org/r/1571150904-3988-4-git-send-email-radhey.shyam.pandey@xilinx.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/xilinx')
-rw-r--r--drivers/dma/xilinx/xilinx_dma.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index 87132bd8cd36..41d536c32957 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -336,7 +336,6 @@ struct xilinx_dma_tx_descriptor {
* @desc_pendingcount: Descriptor pending count
* @ext_addr: Indicates 64 bit addressing is supported by dma channel
* @desc_submitcount: Descriptor h/w submitted count
- * @residue: Residue for AXI DMA
* @seg_v: Statically allocated segments base
* @seg_p: Physical allocated segments base
* @cyclic_seg_v: Statically allocated segment base for cyclic transfers
@@ -373,7 +372,6 @@ struct xilinx_dma_chan {
u32 desc_pendingcount;
bool ext_addr;
u32 desc_submitcount;
- u32 residue;
struct xilinx_axidma_tx_segment *seg_v;
dma_addr_t seg_p;
struct xilinx_axidma_tx_segment *cyclic_seg_v;
@@ -1019,8 +1017,7 @@ static enum dma_status xilinx_dma_tx_status(struct dma_chan *dchan,
}
spin_unlock_irqrestore(&chan->lock, flags);
- chan->residue = residue;
- dma_set_residue(txstate, chan->residue);
+ dma_set_residue(txstate, residue);
}
return ret;