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authorMarkus Pargmann <mpa@pengutronix.de>2013-10-29 11:47:49 +0400
committerVinod Koul <vinod.koul@intel.com>2013-11-13 14:08:31 +0400
commit2dcbdce3610a1ba190a74b782b9f7f1f7f976325 (patch)
tree07919623feae644abd4148a7b0424c4c1e5416e1 /drivers/dma/pl330.c
parentbb3660f130996d2653f123ee1ad802f11adbfb1c (diff)
downloadlinux-2dcbdce3610a1ba190a74b782b9f7f1f7f976325.tar.xz
dma: mxs-dma: Use semaphores for cyclic DMA
mxs dma channel hardware reset command is not reliable and can cause a channel stall. The only way to fix the channel stall is a DMA engine reset. To avoid channel resets we use the hardware semaphore counter. For each transmitted segment, the DMA channel will decrease the counter by one. To use this mechanism with cyclic DMA, we need to increase the semaphore counter with each completed DMA command in the interrupt handler. To avoid any interruptions between the DMA transfers, the semaphore counter is initialized with 2. This way the counter can be increased in the interrupt handler without an influence on the transfer of the DMA engine. When disabling the channel, we stop increasing the semaphore counter in the interrupt handler. This patch was tested on i.MX28 with the SAIF DMA channel. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/pl330.c')
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