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authorDave Jiang <dave.jiang@intel.com>2021-10-25 17:59:49 +0300
committerVinod Koul <vkoul@kernel.org>2021-10-28 20:24:44 +0300
commit2efe58cfaad4ad94eab888d287c174de5209a0c2 (patch)
tree4b2594606b41514ab26342e05dbc025549be8465 /drivers/dma/mediatek
parent1825ecc908d4e77735a993a72406e04e9dfbe5eb (diff)
downloadlinux-2efe58cfaad4ad94eab888d287c174de5209a0c2.tar.xz
dmaengine: idxd: cleanup completion record allocation
According to core-api/dma-api-howto.rst, the address from dma_alloc_coherent is gauranteed to align to the smallest PAGE_SIZE order. That supercedes the 64B/32B alignment requirement of the completion record. Remove alignment adjustment code. Tested-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/163517396063.3484297.7494385225280705372.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/mediatek')
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