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authorRussell King - ARM Linux <linux@arm.linux.org.uk>2012-03-07 02:36:27 +0400
committerVinod Koul <vinod.koul@linux.intel.com>2012-03-13 10:07:42 +0400
commit8ac695463f37af902e953d575d3f782e32e170da (patch)
tree787119e3e1cc3a32e4be22cbff7c03de098eed58 /drivers/dma/iop-adma.c
parent2a926e46022ad7a03e0ac167d8c2b0d88c12c5a8 (diff)
downloadlinux-8ac695463f37af902e953d575d3f782e32e170da.tar.xz
dmaengine: ensure all DMA engine drivers initialize their cookies
Ensure all DMA engine drivers initialize their cookies in the same way, so that they all behave in a similar fashion. This means their first issued cookie will be 2 rather than 1, and will increment to INT_MAX before returning 1 and starting over. In connection with this, Dan Williams said: > Russell King wrote: > > Secondly, some DMA engine drivers initialize the dma_chan cookie to 0, > > others to 1.  Is there a reason for this, or are these all buggy? > > I know that ioat and iop-adma expect 0 to mean "I have cleaned up this > descriptor and it is idle", and would break if zero was an in-flight > cookie value. The reserved usage of zero is an driver internal > concern, but I have no problem formalizing it as a reserved value. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Diffstat (limited to 'drivers/dma/iop-adma.c')
-rw-r--r--drivers/dma/iop-adma.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/dma/iop-adma.c b/drivers/dma/iop-adma.c
index 4370b1015f73..1f3a703ed0e0 100644
--- a/drivers/dma/iop-adma.c
+++ b/drivers/dma/iop-adma.c
@@ -1545,6 +1545,7 @@ static int __devinit iop_adma_probe(struct platform_device *pdev)
INIT_LIST_HEAD(&iop_chan->chain);
INIT_LIST_HEAD(&iop_chan->all_slots);
iop_chan->common.device = dma_dev;
+ dma_cookie_init(&iop_chan->common);
list_add_tail(&iop_chan->common.device_node, &dma_dev->channels);
if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {