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author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2019-01-07 14:07:39 +0300 |
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committer | Vinod Koul <vkoul@kernel.org> | 2019-01-07 15:27:13 +0300 |
commit | 91f0ff883e9ae654503fc62c588eefc8558e457f (patch) | |
tree | 69eb9940144d3d6fd2e6066e81c636237e3171f1 /drivers/dma/dw/regs.h | |
parent | 69da8be90d5e85e60b5377c47384154b9dabf592 (diff) | |
download | linux-91f0ff883e9ae654503fc62c588eefc8558e457f.tar.xz |
dmaengine: dw: Reset DRAIN bit when resume the channel
For Intel iDMA 32-bit the channel can be drained on a suspend.
We need to reset the bit on the resume to return a status quo.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/dw/regs.h')
-rw-r--r-- | drivers/dma/dw/regs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h index 66aa8b227248..6cf299facf45 100644 --- a/drivers/dma/dw/regs.h +++ b/drivers/dma/dw/regs.h @@ -315,6 +315,7 @@ struct dw_dma { /* Channel operations */ void (*initialize_chan)(struct dw_dma_chan *dwc); void (*suspend_chan)(struct dw_dma_chan *dwc, bool drain); + void (*resume_chan)(struct dw_dma_chan *dwc, bool drain); void (*encode_maxburst)(struct dw_dma_chan *dwc, u32 *maxburst); u32 (*bytes2block)(struct dw_dma_chan *dwc, size_t bytes, unsigned int width, size_t *len); |