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| author | Kedareswara rao Appana <appana.durga.rao@xilinx.com> | 2016-07-01 14:37:06 +0300 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2016-07-08 08:55:34 +0300 |
| commit | b0cc417c1637192be658e68a74c8d1568e3d35f6 (patch) | |
| tree | 1ad03ac982bc0e17c3a34b0b2ce0bf30999145d7 /drivers/dma/Kconfig | |
| parent | 805abc5f2f5d374086114f941e5bb6cb02e0c955 (diff) | |
| download | linux-b0cc417c1637192be658e68a74c8d1568e3d35f6.tar.xz | |
dmaengine: Add Xilinx zynqmp dma engine driver support
Added the driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. This dma controller supports memory to memory
and I/O to I/O buffer transfers.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/Kconfig')
| -rw-r--r-- | drivers/dma/Kconfig | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index 1f39f3ef6c8d..cde83f41d874 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -538,6 +538,13 @@ config XILINX_DMA AXI DMA engine provides high-bandwidth one dimensional direct memory access between memory and AXI4-Stream target peripherals. +config XILINX_ZYNQMP_DMA + tristate "Xilinx ZynqMP DMA Engine" + depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) + select DMA_ENGINE + help + Enable support for Xilinx ZynqMP DMA controller. + config ZX_DMA tristate "ZTE ZX296702 DMA support" depends on ARCH_ZX |