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authorSrujana Challa <schalla@marvell.com>2021-01-15 16:52:20 +0300
committerHerbert Xu <herbert@gondor.apana.org.au>2021-01-22 06:58:02 +0300
commit83ffcf78627f98919ebae3dc6715982cc83176ed (patch)
tree010305d9561aa466ebaa1caed49843d15f94c1b1 /drivers/crypto/marvell/octeontx2/otx2_cptpf.h
parent5e8ce8334734c5f23fe54774e989b395bc6da635 (diff)
downloadlinux-83ffcf78627f98919ebae3dc6715982cc83176ed.tar.xz
crypto: octeontx2 - add mailbox communication with AF
In the resource virtualization unit (RVU) each of the PF and AF (admin function) share a 64KB of reserved memory region for communication. This patch initializes PF <=> AF mailbox IRQs, registers handlers for processing these communication messages. Signed-off-by: Suheil Chandran <schandran@marvell.com> Signed-off-by: Lukasz Bartosik <lbartosik@marvell.com> Signed-off-by: Srujana Challa <schalla@marvell.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/marvell/octeontx2/otx2_cptpf.h')
-rw-r--r--drivers/crypto/marvell/octeontx2/otx2_cptpf.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptpf.h b/drivers/crypto/marvell/octeontx2/otx2_cptpf.h
index 84cdc8cc2c15..87fe4c6838e5 100644
--- a/drivers/crypto/marvell/octeontx2/otx2_cptpf.h
+++ b/drivers/crypto/marvell/octeontx2/otx2_cptpf.h
@@ -5,9 +5,21 @@
#ifndef __OTX2_CPTPF_H
#define __OTX2_CPTPF_H
+#include "otx2_cpt_common.h"
+
struct otx2_cptpf_dev {
void __iomem *reg_base; /* CPT PF registers start address */
+ void __iomem *afpf_mbox_base; /* PF-AF mbox start address */
struct pci_dev *pdev; /* PCI device handle */
+ /* AF <=> PF mbox */
+ struct otx2_mbox afpf_mbox;
+ struct work_struct afpf_mbox_work;
+ struct workqueue_struct *afpf_mbox_wq;
+
+ u8 pf_id; /* RVU PF number */
};
+irqreturn_t otx2_cptpf_afpf_mbox_intr(int irq, void *arg);
+void otx2_cptpf_afpf_mbox_handler(struct work_struct *work);
+
#endif /* __OTX2_CPTPF_H */