diff options
| author | Zhou Wang <wangzhou1@hisilicon.com> | 2019-08-02 10:57:55 +0300 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2019-08-09 08:11:57 +0300 |
| commit | 72c7a68d2ea34803e9c4ef948261ec6744fc72fc (patch) | |
| tree | 31088e14ee71e3d1bf475d9c42f21d1cf54fdaa7 /drivers/crypto/hisilicon/qm.h | |
| parent | 8201fdf49ff0950fa7a0c55a4aeb1ba3d747d404 (diff) | |
| download | linux-72c7a68d2ea34803e9c4ef948261ec6744fc72fc.tar.xz | |
crypto: hisilicon - add debugfs for ZIP and QM
HiSilicon ZIP engine driver uses debugfs to provide debug information,
the usage can be found in /Documentation/ABI/testing/debugfs-hisi-zip.
Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/hisilicon/qm.h')
| -rw-r--r-- | drivers/crypto/hisilicon/qm.h | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/drivers/crypto/hisilicon/qm.h b/drivers/crypto/hisilicon/qm.h index 8b3cb69dffca..70e672ae86bf 100644 --- a/drivers/crypto/hisilicon/qm.h +++ b/drivers/crypto/hisilicon/qm.h @@ -46,6 +46,13 @@ #define PEH_AXUSER_CFG 0x401001 #define PEH_AXUSER_CFG_ENABLE 0xffffffff +#define QM_DFX_MB_CNT_VF 0x104010 +#define QM_DFX_DB_CNT_VF 0x104020 +#define QM_DFX_SQE_CNT_VF_SQN 0x104030 +#define QM_DFX_CQE_CNT_VF_CQN 0x104040 +#define QM_DFX_QN_SHIFT 16 +#define CURRENT_FUN_MASK GENMASK(5, 0) +#define CURRENT_Q_MASK GENMASK(31, 16) #define QM_AXI_RRESP BIT(0) #define QM_AXI_BRESP BIT(1) @@ -83,6 +90,25 @@ enum qm_fun_type { QM_HW_VF, }; +enum qm_debug_file { + CURRENT_Q, + CLEAR_ENABLE, + DEBUG_FILE_NUM, +}; + +struct debugfs_file { + enum qm_debug_file index; + struct mutex lock; + struct qm_debug *debug; +}; + +struct qm_debug { + u32 curr_qm_qp_num; + struct dentry *debug_root; + struct dentry *qm_d; + struct debugfs_file files[DEBUG_FILE_NUM]; +}; + struct qm_dma { void *va; dma_addr_t dma; @@ -128,6 +154,8 @@ struct hisi_qm { const struct hisi_qm_hw_ops *ops; + struct qm_debug debug; + u32 error_mask; u32 msi_mask; @@ -183,4 +211,5 @@ void hisi_qm_hw_error_init(struct hisi_qm *qm, u32 ce, u32 nfe, u32 fe, u32 msi); int hisi_qm_hw_error_handle(struct hisi_qm *qm); enum qm_hw_ver hisi_qm_get_hw_version(struct pci_dev *pdev); +void hisi_qm_debug_regs_clear(struct hisi_qm *qm); #endif |