diff options
author | Ingo Molnar <mingo@kernel.org> | 2015-03-04 08:35:43 +0300 |
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committer | Ingo Molnar <mingo@kernel.org> | 2015-03-04 08:35:43 +0300 |
commit | d2c032e3dc58137a7261a7824d3acce435db1d66 (patch) | |
tree | 7eea1c7c6103eefe879f07472eec99b3c41eb792 /drivers/coresight/coresight-etm3x.c | |
parent | 7e8e385aaf6ed5b64b5d9108081cfcdcdd021b78 (diff) | |
parent | 13a7a6ac0a11197edcd0f756a035f472b42cdf8b (diff) | |
download | linux-d2c032e3dc58137a7261a7824d3acce435db1d66.tar.xz |
Merge tag 'v4.0-rc2' into x86/asm, to refresh the tree
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'drivers/coresight/coresight-etm3x.c')
-rw-r--r-- | drivers/coresight/coresight-etm3x.c | 24 |
1 files changed, 14 insertions, 10 deletions
diff --git a/drivers/coresight/coresight-etm3x.c b/drivers/coresight/coresight-etm3x.c index d9e3ed6aa857..c965f5724abd 100644 --- a/drivers/coresight/coresight-etm3x.c +++ b/drivers/coresight/coresight-etm3x.c @@ -34,14 +34,8 @@ #include "coresight-etm.h" -#ifdef CONFIG_CORESIGHT_SOURCE_ETM_DEFAULT_ENABLE -static int boot_enable = 1; -#else static int boot_enable; -#endif -module_param_named( - boot_enable, boot_enable, int, S_IRUGO -); +module_param_named(boot_enable, boot_enable, int, S_IRUGO); /* The number of ETM/PTM currently registered */ static int etm_count; @@ -573,7 +567,8 @@ static ssize_t mode_store(struct device *dev, if (drvdata->mode & ETM_MODE_STALL) { if (!(drvdata->etmccr & ETMCCR_FIFOFULL)) { dev_warn(drvdata->dev, "stall mode not supported\n"); - return -EINVAL; + ret = -EINVAL; + goto err_unlock; } drvdata->ctrl |= ETMCR_STALL_MODE; } else @@ -582,7 +577,8 @@ static ssize_t mode_store(struct device *dev, if (drvdata->mode & ETM_MODE_TIMESTAMP) { if (!(drvdata->etmccer & ETMCCER_TIMESTAMP)) { dev_warn(drvdata->dev, "timestamp not supported\n"); - return -EINVAL; + ret = -EINVAL; + goto err_unlock; } drvdata->ctrl |= ETMCR_TIMESTAMP_EN; } else @@ -595,6 +591,10 @@ static ssize_t mode_store(struct device *dev, spin_unlock(&drvdata->spinlock); return size; + +err_unlock: + spin_unlock(&drvdata->spinlock); + return ret; } static DEVICE_ATTR_RW(mode); @@ -1743,7 +1743,11 @@ static void etm_init_arch_data(void *info) static void etm_init_default_data(struct etm_drvdata *drvdata) { - static int etm3x_traceid; + /* + * A trace ID of value 0 is invalid, so let's start at some + * random value that fits in 7 bits and will be just as good. + */ + static int etm3x_traceid = 0x10; u32 flags = (1 << 0 | /* instruction execute*/ 3 << 3 | /* ARM instruction */ |