diff options
| author | Biju Das <biju.das.jz@bp.renesas.com> | 2021-11-12 21:44:12 +0300 |
|---|---|---|
| committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2021-12-09 16:05:20 +0300 |
| commit | 3a3e9f23c2cae907677a236fa547610ca747e6fb (patch) | |
| tree | 1a43b307200f82c7dceb0699b9f71d61d3fb4989 /drivers/clocksource | |
| parent | 92d06a3f67ad809649d26aa7698e4d42362585a8 (diff) | |
| download | linux-3a3e9f23c2cae907677a236fa547610ca747e6fb.tar.xz | |
clocksource/drivers/renesas-ostm: Add RZ/G2L OSTM support
RZ/G2L SoC has Generic Timer Module(a.k.a OSTM) which needs to
deassert the reset line before accessing any registers.
This patch adds an entry point for RZ/G2L so that we can deassert
the reset line in probe callback.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20211112184413.4391-4-biju.das.jz@bp.renesas.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'drivers/clocksource')
| -rw-r--r-- | drivers/clocksource/renesas-ostm.c | 39 |
1 files changed, 38 insertions, 1 deletions
diff --git a/drivers/clocksource/renesas-ostm.c b/drivers/clocksource/renesas-ostm.c index 3d06ba66008c..21d1392637b8 100644 --- a/drivers/clocksource/renesas-ostm.c +++ b/drivers/clocksource/renesas-ostm.c @@ -9,6 +9,8 @@ #include <linux/clk.h> #include <linux/clockchips.h> #include <linux/interrupt.h> +#include <linux/platform_device.h> +#include <linux/reset.h> #include <linux/sched_clock.h> #include <linux/slab.h> @@ -159,6 +161,7 @@ static int __init ostm_init_clkevt(struct timer_of *to) static int __init ostm_init(struct device_node *np) { + struct reset_control *rstc; struct timer_of *to; int ret; @@ -166,6 +169,14 @@ static int __init ostm_init(struct device_node *np) if (!to) return -ENOMEM; + rstc = of_reset_control_get_optional_exclusive(np, NULL); + if (IS_ERR(rstc)) { + ret = PTR_ERR(rstc); + goto err_free; + } + + reset_control_deassert(rstc); + to->flags = TIMER_OF_BASE | TIMER_OF_CLOCK; if (system_clock) { /* @@ -178,7 +189,7 @@ static int __init ostm_init(struct device_node *np) ret = timer_of_init(np, to); if (ret) - goto err_free; + goto err_reset; /* * First probed device will be used as system clocksource. Any @@ -203,9 +214,35 @@ static int __init ostm_init(struct device_node *np) err_cleanup: timer_of_cleanup(to); +err_reset: + reset_control_assert(rstc); + reset_control_put(rstc); err_free: kfree(to); return ret; } TIMER_OF_DECLARE(ostm, "renesas,ostm", ostm_init); + +#ifdef CONFIG_ARCH_R9A07G044 +static int __init ostm_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + + return ostm_init(dev->of_node); +} + +static const struct of_device_id ostm_of_table[] = { + { .compatible = "renesas,ostm", }, + { /* sentinel */ } +}; + +static struct platform_driver ostm_device_driver = { + .driver = { + .name = "renesas_ostm", + .of_match_table = of_match_ptr(ostm_of_table), + .suppress_bind_attrs = true, + }, +}; +builtin_platform_driver_probe(ostm_device_driver, ostm_probe); +#endif |