diff options
| author | Dmitry Osipenko <digetx@gmail.com> | 2019-06-18 17:03:53 +0300 |
|---|---|---|
| committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2019-06-25 20:49:18 +0300 |
| commit | 09b2507fbf576ece526563886f5c215fda470924 (patch) | |
| tree | e05b0a2edaf9d432359060ea97abe620f6db0c20 /drivers/clocksource/timer-tegra.c | |
| parent | 99311d0e841c4235f784551af224de148feebc9b (diff) | |
| download | linux-09b2507fbf576ece526563886f5c215fda470924.tar.xz | |
clocksource/drivers/tegra: Set and use timer's period
The of_clk structure has a period field that is set up initially by
timer_of_clk_init(), that period value need to be adjusted for a case of
TIMER1-9 that are running at a fixed rate that doesn't match the clock's
rate. Note that the period value is currently used only by some of the
clocksource drivers internally and hence this is just a minor cleanup
change that doesn't fix anything.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'drivers/clocksource/timer-tegra.c')
| -rw-r--r-- | drivers/clocksource/timer-tegra.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/clocksource/timer-tegra.c b/drivers/clocksource/timer-tegra.c index f172a57cc5fe..41257f89a216 100644 --- a/drivers/clocksource/timer-tegra.c +++ b/drivers/clocksource/timer-tegra.c @@ -73,9 +73,9 @@ static int tegra_timer_shutdown(struct clock_event_device *evt) static int tegra_timer_set_periodic(struct clock_event_device *evt) { void __iomem *reg_base = timer_of_base(to_timer_of(evt)); + unsigned long period = timer_of_period(to_timer_of(evt)); - writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | - ((timer_of_rate(to_timer_of(evt)) / HZ) - 1), + writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | (period - 1), reg_base + TIMER_PTV); return 0; @@ -299,6 +299,7 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20, cpu_to->clkevt.rating = rating; cpu_to->clkevt.cpumask = cpumask_of(cpu); cpu_to->of_base.base = timer_reg_base + base; + cpu_to->of_clk.period = rate / HZ; cpu_to->of_clk.rate = rate; irq_set_status_flags(cpu_to->clkevt.irq, IRQ_NOAUTOEN); |