diff options
| author | Palmer Dabbelt <palmer@dabbelt.com> | 2018-08-04 11:23:19 +0300 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2018-08-13 18:31:31 +0300 |
| commit | 62b0194368147def8c5a77ce604a125d620fc582 (patch) | |
| tree | ffb0a3da4944a8aa15ce481a5e695acc03da3684 /drivers/clocksource/Kconfig | |
| parent | 6ea0f26a7913b2a72f9cbe84e77ad2cbeaaa9dde (diff) | |
| download | linux-62b0194368147def8c5a77ce604a125d620fc582.tar.xz | |
clocksource: new RISC-V SBI timer driver
The RISC-V ISA defines a per-hart real-time clock and timer, which is
present on all systems. The clock is accessed via the 'rdtime'
pseudo-instruction (which reads a CSR), and the timer is set via an SBI
call.
Contains various improvements from Atish Patra <atish.patra@wdc.com>.
Signed-off-by: Dmitriy Cherkasov <dmitriy@oss-tech.org>
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
[hch: remove dead code, add SPDX tags, used riscv_of_processor_hart(),
minor cleanups, merged hotplug cpu support and other improvements
from Atish]
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'drivers/clocksource/Kconfig')
| -rw-r--r-- | drivers/clocksource/Kconfig | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index dec0dd88ec15..a11f4ba98b05 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -609,4 +609,15 @@ config ATCPIT100_TIMER help This option enables support for the Andestech ATCPIT100 timers. +config RISCV_TIMER + bool "Timer for the RISC-V platform" + depends on RISCV + default y + select TIMER_PROBE + select TIMER_OF + help + This enables the per-hart timer built into all RISC-V systems, which + is accessed via both the SBI and the rdcycle instruction. This is + required for all RISC-V systems. + endmenu |