diff options
| author | Peter De Schrijver <pdeschrijver@nvidia.com> | 2017-02-28 18:19:24 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2017-03-20 16:09:05 +0300 |
| commit | 3843832fc8cadc2d48ba4ea4cd350a696906ac42 (patch) | |
| tree | 68fb38c13a3a53ec1f46a44487105caf0dde80f9 /drivers/clk | |
| parent | 24c3ebef1ab6d5620eaaa51f69223118cac97db6 (diff) | |
| download | linux-3843832fc8cadc2d48ba4ea4cd350a696906ac42.tar.xz | |
clk: tegra: Handle UTMIPLL IDDQ
Export UTMIPLL IDDQ functions. These will be needed when powergating the
XUSB partition.
Signed-off-by: BH Hsieh <bhsieh@nvidia.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/tegra/clk-tegra210.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c index 9a2512a6b419..f89d2a912273 100644 --- a/drivers/clk/tegra/clk-tegra210.c +++ b/drivers/clk/tegra/clk-tegra210.c @@ -2313,6 +2313,32 @@ static const char * const aclk_parents[] = { "clk_m" }; +void tegra210_put_utmipll_in_iddq(void) +{ + u32 reg; + + reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0); + + if (reg & UTMIPLL_HW_PWRDN_CFG0_UTMIPLL_LOCK) { + pr_err("trying to assert IDDQ while UTMIPLL is locked\n"); + return; + } + + reg |= UTMIPLL_HW_PWRDN_CFG0_IDDQ_OVERRIDE; + writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0); +} +EXPORT_SYMBOL_GPL(tegra210_put_utmipll_in_iddq); + +void tegra210_put_utmipll_out_iddq(void) +{ + u32 reg; + + reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0); + reg &= ~UTMIPLL_HW_PWRDN_CFG0_IDDQ_OVERRIDE; + writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0); +} +EXPORT_SYMBOL_GPL(tegra210_put_utmipll_out_iddq); + static __init void tegra210_periph_clk_init(void __iomem *clk_base, void __iomem *pmc_base) { |