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authorJean-Francois Moine <moinejf@free.fr>2016-08-24 09:32:51 +0300
committerStephen Boyd <sboyd@codeaurora.org>2016-08-31 00:52:26 +0300
commit3174b0c9a62bb3738b4a2a506b8a075d4430e353 (patch)
tree20a7de871301110dbbd452e3b916c875fbe5a214 /drivers/clk
parent911d49c7a09aaf277b03bf4ef23015af8cdfea6f (diff)
downloadlinux-3174b0c9a62bb3738b4a2a506b8a075d4430e353.tar.xz
clk: core: Force setting the phase delay when no change
This patch reverts commit 023bd7166be0 ("clk: skip unnecessary set_phase if nothing to do"), fixing two problems: * in some SoCs, the hardware phase delay depends on the rate ratio of the clock and its parent. So, changing this ratio may imply to set new hardware values, even if the logical delay is the same. * when the delay was the same as previously, an error was returned. Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Fixes: 023bd7166be0 ("clk: skip unnecessary set_phase if nothing to do") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/clk.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index d3d26148cdfb..0fb39fe217d1 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -1908,10 +1908,6 @@ int clk_set_phase(struct clk *clk, int degrees)
clk_prepare_lock();
- /* bail early if nothing to do */
- if (degrees == clk->core->phase)
- goto out;
-
trace_clk_set_phase(clk->core, degrees);
if (clk->core->ops->set_phase)
@@ -1922,7 +1918,6 @@ int clk_set_phase(struct clk *clk, int degrees)
if (!ret)
clk->core->phase = degrees;
-out:
clk_prepare_unlock();
return ret;